Embodiments disclosed herein relate generally to electronic packages, and, more particularly, to a semiconductor package in which a solder joint for joining a flip chip lead frame and an electronic device is improved in structure to have an enhanced coupling force and method of fabricating the same.
Generally, a conductive lead frame is a type of substrate used for fabricating a semiconductor package. The lead frame is the central supporting structure of such a package, and typically is fabricated by chemically etching or mechanically stamping a metal strip. The lead frame typically includes a side frame defining an entire framework, a chip pad for mounting one or more semiconductor chips, one or more tie bars integrally connecting the side frame to the chip pad, and a plurality of leads extending from the side frame in such a way as to be adjacent or proximate to all sides of the chip pad. A portion of the lead frame is internal to the package body or completely surrounded by a plastic encapsulant, such as a mold compound. Portions of the leads of the leadframe may extend externally from the package body or may be partially exposed therein for use in electrically connecting the package to another component. In certain semiconductor packages, a portion of the die pad of the leadframe also remains exposed within the package body.
There is a class of semiconductor packages referred to as near chip scale packages (CSP) that include very thin, fine pitch, and small area lead frames that approximate the size of the semiconductor chip. Such packages include the MicroLeadFrame® (MLF) style of packages. These packages typically have package body sizes in the 1 mm to 13 mm range and package heights in the 0.3 mm to 2.1 mm range. In order to enhance unit productivity, near chip scale packages such as MLF style packages are assembled in a matrix of multiple leadframes and encapsulated in an overmolding process. The individual MLF structures are then separated into individual packages typically using a sawing process, which cuts through the mold compound and the lead frames.
In some applications, flip chip attachment of semiconductor chips to lead frames is continuing to grow compared semiconductor chips connected using conductive wires. The growth of flip chip attachment is being driven by, among other things, form factor and product performance. Types of semiconductor chips seeing growth in flip chip attachment include microprocessors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), digital signal processors (DSPs), media products, and graphics chips, among others.
Earlier versions of flip chip attached semiconductor chips used evaporated bumps (e.g., C4 bumps) and electroplated bumps (e.g., high-Pb bumps). Currently, the industry is moving towards an expanded use of conductive pillar structures (e.g., copper pillar structures) particularly with smaller geometry process nodes. Copper pillar structures are preferred because, among other things, they are configured to provide small form factors to support smaller die sizes, improved electrical performance, and greener (i.e., lead-free) manufacturing solutions.
Using conductive pillar structures with near chip scale packages, such as MLF style packages has presented several manufacturing problems. Specifically, with the industry requirement for lead frames to have very fine lead pitches, the width of each lead is being reduced. Also, in order to improve electrical performance, the size of the conductive bumps, such as copper pillars, is being increased. However, with the reduced lead widths the solder joint formed between the pillar and the lead has been found to be unsatisfactorily weak and a source of reliability problems.
Accordingly, it is desirable to have a semiconductor package structure and method that overcome the issues with related flip chip packages described previously, as well as others. It is also desirable to have a structure and method that is cost effective, easy to integrate into assembly process flows, and reliable.
For simplicity and clarity of the illustration, elements in the figures are not necessarily drawn to scale, and the same reference numbers in different figures can denote the same elements. The use of the word about, approximately or substantially means that a value of an element has a parameter that is expected to be close to a stated value or position. However, as is well known in the art there are always minor variances that prevent the values or positions from being exactly as stated. Additionally, descriptions and details of well-known steps and elements may be omitted for simplicity of the description.